The present invention relates to the formation of dielectric layers. More particularly, the present invention relates to a method for forming a low dielectric constant film that is particularly useful as a premetal or intermetal dielectric layer in an integrated circuit.
Semiconductor device geometries have dramatically decreased in size since integrated circuits were first introduced several decades ago, and all indications are that this trend will continue. Although today's wafer fabrication plants are routinely producing ever-shrinking devices, the plants of the future will soon be producing devices having even smaller geometries.
In order to continue to reduce the size of devices on integrated circuits, it has become necessary to use insulators having a low dielectric constant. Such films are particularly desirable for premetal dielectric (PMD) layers and intermetal dielectric (IMD) layers to reduce the RC time delay of the interconnect metalization, to prevent crosstalk between the different levels of metalization, and to reduce device power consumption. To this end, several semiconductor manufacturers, materials suppliers and research organizations have focused on identifying low and extremely low dielectric constant films. As used herein, low dielectric constant materials are those films having a dielectric constant between 3.0 to 2.5 and extremely low dielectric constant (“ELk”) films are those films having a dielectric constant below 2.5 extending to dielectric constants below 2.0.
One approach for reducing the dielectric constant includes introducing high porosity into the dielectric film layer. The dielectric constant of air is nominally 1. Thus, dielectric films when made porous, tend to have much lower dielectric constants relative to the solid film, and values of dielectric constants less than 2.5 are becoming achievable.
One method of forming a particular type of ELk material is based on a sol-gel process, in which high porosity films are produced by hydrolysis and polycondensation of a silicon alkoxide such as tetraethylorthosilicate (TEOS). The sol-gel process is a versatile solution process for making ceramic material. In general, the sol-gel process involves the transition of a system from a homogeneous liquid “sol” (mostly colloidal) into a solid “gel” phase. The starting materials used in the preparation of the “sol” are usually inorganic salts or compounds such as silicon alkoxides. The precursor solutions are typically deposited on a substrate by spin on methods. In a typical sol-gel process, the precursor is subjected to a series of hydrolysis and polymerization reactions to form a colloidal suspension, or a “sol.” Further processing of the “sol” enables one to make ceramic materials in different forms. The further processing may include the thermal decomposition of a thermally labile component, which may include the formation of an ordered surfactant-templated microstructure film by evaporation-induced self-assembly, followed by the thermal decomposition of the template.
In a particular sol-gel-based process for forming a porous low dielectric constant film, surfactants act as the template for the film's porosity. The porous film is generally formed by the deposition on a substrate of a sol-gel precursor followed by selective evaporation of solvent components of the sol-gel precursor to form supramolecular assemblies. The assemblies are then formed into porous films by the pyrolysis of the supramolecular surfactant templates at a temperature range between approximately 300 and 450° C. This particular sol-gel-based process can produce porous films with controllable pore size and advantageously, with narrow distributions of pore size, which is beneficial for integrated circuit manufacture.
FIG. 1 is a flowchart illustrating a basic sol-gel-based process that has been previously proposed to deposit ELk films. As shown in FIG. 1, the first step is the synthesis of the stock precursor solution (step 100 ). The stock precursor solution is prepared, for example, by combining a soluble silicon oxide source, e.g., TEOS, water, a solvent, e.g., alcohol, and an acid catalyst, e.g., hydrochloric acid, in particular mole ratios at certain prescribed environmental conditions and mixed for certain time periods.
Once the stock solution is obtained, the coating solution is mixed (step 110). The general procedure to prepare the coating solution is to add a surfactant to the stock solution. The surfactants are used as templates for the porous silica. In later processes the surfactants are baked out (i.e., calcined), leaving behind a porous silicon oxide film. Typical surfactants exhibit an amphiphilic nature, meaning that they can be both hydrophilic and hydrophobic at the same time. Amphiphilic surfactants possess a hydrophilic head group or groups which have a strong affinity for water and a long hydrophobic tail which repels water. The long hydrophobic tail acts as the template member which later provides the pores for the porous film. Amphiphiles can aggregate into supramolecular arrays in solution and in the solidifying gel as the solvent is removed during spin-coating, forming a structure which serves as a template for the porous film. Templating oxides around these arrays leads to materials that exhibit controllable pore sizes and shapes. The surfactants can be anionic, cationic, or nonionic, though for the formation of dielectric layers for IC applications, non-ionic surfactants are generally preferred. The acid catalyst is added to accelerate the condensation reaction of the silica around the supramolecular aggregates.
After the coating solution is mixed it is deposited on the substrate (step 120) using a spinning process where centrifugal draining ensures that the substrate is uniformly coated with the coating solution. The coated substrate is then pre-baked to complete the hydrolysis of the TEOS precursor, continue the gelation process, and drive off any remaining solvent from the film (step 130).
The pre-baked substrate can then be further baked to form a hard-baked film (step 140). The temperature range chosen for the bake step will ensure that excess water is evaporated out of the spin cast film. At this stage the film is comprised of a hard-baked matrix of silica and surfactant with the surfactant possessing an interconnected structure characteristic of the type and amount of surfactant employed. An interconnected structure aids the implementation of the subsequent surfactant extraction phase. An interconnected structure provides continuous pathways for the subsequently ablated surfactant molecules to escape from the porous oxide matrix.
Typical silica-based films often have hydrophilic pore walls and aggressively absorb moisture from the surrounding environment. If water, which has a dielectric constant (k) of about 78, is absorbed into the porous film, then the low k dielectric properties of the film can be detrimentally affected. Often these hydrophilic films are annealed at elevated temperatures to remove moisture and to ablate and extract the surfactant out of the silica-surfactant matrix. Such an anneal step leaves behind a porous film exhibiting interconnected pores (step 150). But this is only a temporary solution in a deposition process since the films may still be sensitive to moisture absorption following this procedure.
Some sol-gel processes include further post-deposition treatment steps that are aimed at modifying the surface characteristic of the pores to impart various desired properties, such as hydrophobicity, and increased resistance to certain chemicals. A typical treatment that renders the film more stable is treatment with HMDS (hexamethyldisilizane, [(CH3)3—Si—NH—Si—(CH3)3]), in a dehydroxylating process which will remove the hydroxyl groups, replace them with trimethylsilyl groups, and render the film hydrophobic (step 160). Alternatively, or in conjunction with such a silylation step, the porous material may be rendered more hydrophobic by the addition of an alkyl substituted silicon precursor, such as methyl triethoxysilane, CH3Si(OCH2CH3)3, (MTES) to the precursor formulation. It has been found that replacement of a significant fraction of the TEOS with MTES (for example 30-70%) in the liquid precursor formulation generates films exhibiting good resistance to moisture absorption without subsequent exposure to HMDS.
A variety of alternatives to the above-described sol-gel process for depositing ELk materials have been proposed. Many of these alternatives follow the same basic general approach discussed above but vary the choice of ingredients used in the coating solution, the processing times and/or temperatures; combine certain steps; and/or divide other steps into various substeps.
However, none of the variations or alternatives known to the present inventors are suitable for use in integrated circuit fabrication due to the unacceptable impurity types or poorly controlled or uncontrolled impurity levels associated with commercially available surfactant components in the precursor solutions used for porous ELk deposition.
In order for the film to be suitable and allow for a successful integration for IC fabrication, the film must have controlled level of impurities or it must be deposited using ingredients that have minimal levels of impurities that are harmful in silicon oxide-based insulator films in microelectronic devices. Impurities that are harmful in silicon oxide-based insulator films include alkali ions such as sodium and potassium which transport under the influence of an electric field and which are non-volatile. These impurities are typically introduced into the film as parts of the surfactants which are used in surfactant templated porous oxide precursor formulations.
It is known in the semiconductor integrated circuit industry that alkali metal ions (such as sodium and potassium) must be rigorously excluded from silicon dioxide films used as MOS transistor insulators and multilevel interconnection insulators because these positively-charged ions are mobile when exposed to electric fields, drifting away from the positively-biased film interface and toward the negatively-biased film interface, causing capacitance-voltage shifts. While the exclusion of sodium has received the most attention because of its ubiquitous presence and high mobility, other alkali ions, especially potassium and lithium, are also equally problematic and must also be excluded from insulator films. Alkali metal impurity specifications for chemical precursor solutions (e.g., TEOS) for integrated circuit applications typically set the allowable impurity levels to approximately 20 parts per billion maximum for each type of alkali metal.
As stated above, the surfactants can be anionic, cationic, or nonionic, through for microelectronic applications the class of nonionic surfactants are generally preferred. Most anionic surfactants are not suitable for microelectronic applications because the molecules contain either alkali or alkaline earth metals, sulfate or sulfonate groups that are considered contaminants in microelectronic devices. Although cationic surfactants differ structurally from anionic surfactants, they may suffer from similar problems, as they necessarily incorporate counteranions which may remain in the film and exhibit migration under electric fields or promote corrosion of metal or barrier films.
Therefore, there is a need to arrive at a formulation which uses surfactants that do not contain the impurities which are unacceptable for microelectronic applications, yet which produce low dielectric constant films.